? semiconductor components industries, llc, 2010 april, 2010 ? rev. 1 1 publication order number: ndf08n50z/d ndf08n50z, NDP08N50Z n-channel power mosfet 500 v, 0.69 features ? low on resistance ? low gate charge ? 100% avalanche tested ? these devices are pb ? free and are rohs compliant absolute maximum ratings (t c = 25 c unless otherwise noted) rating symbol ndf08n50z NDP08N50Z unit drain ? to ? source voltage v dss 500 v continuous drain current r jc i d 7.5 (note 1) 7.5 a continuous drain current r jc t a = 100 c i d 4.7 (note 1) 4.7 a pulsed drain current, v gs @ 10 v i dm 30 (note 1) 30 a power dissipation p d 31 125 w gate ? to ? source voltage v gs 30 v single pulse avalanche energy, i d = 7.5 a e as 190 mj esd (hbm) (jesd 22 ? a114) v esd 3500 v rms isolation voltage (t = 0.3 sec., r.h. 30%, t a = 25 c) (figure 14) v iso 4500 v peak diode recovery dv/dt 4.5 v/ns continuous source current (body diode) i s 7.5 a maximum temperature for soldering leads t l 260 c operating junction and storage temperature range t j , t stg ? 55 to 150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. limited by maximum junction temperature 2. i sd = 7.5 a, di/dt 100 a/ s, v dd bv dss , t j = +150 c device package shipping ordering information NDP08N50Zg to ? 220ab in development n ? channel marking diagram a = location code y = year ww = work week g = pb ? free package http://onsemi.com v dss r ds(on) (typ) @ 3.6 a 500 v 0.69 ndf08n50zg or NDP08N50Zg ayww gate source drain to ? 220fp case 221d style 1 ndf08n50zg to ? 220fp 50 units/rail to ? 220ab case 221a style 5 g (1) d (2) s (3)
ndf08n50z, NDP08N50Z http://onsemi.com 2 thermal resistance parameter symbol ndf08n50z NDP08N50Z unit junction ? to ? case (drain) r jc 4.0 1.0 c/w junction ? to ? ambient steady state (note 3) r ja 50 50 3. insertion mounted electrical characteristics (t j = 25 c unless otherwise noted) characteristic test conditions symbol min typ max unit off characteristics drain ? to ? source breakdown voltage v gs = 0 v, i d = 1 ma bv dss 500 v breakdown voltage temperature coefficient reference to 25 c, i d = 1 ma bv dss / t j 0.6 v/ c drain ? to ? source leakage current v ds = 500 v, v gs = 0 v 25 c i dss 1 a 150 c 50 gate ? to ? source forward leakage v gs = 20 v i gss 10 a on characteristics (note 4) static drain ? to ? source on ? resistance v gs = 10 v, i d = 3.6 a r ds(on) 0.69 0.85 gate threshold voltage v ds = v gs , i d = 100 a v gs(th) 3.0 4.5 v forward transconductance v ds = 15 v, i d = 3.75 a g fs 6.0 s dynamic characteristics input capacitance v ds = 25 v, v gs = 0 v, f = 1.0 mhz c iss 912 pf output capacitance c oss 120 reverse transfer capacitance c rss 27 total gate charge v dd = 250 v, i d = 7.5 a, v gs = 10 v q g 31 nc gate ? to ? source charge q gs 6.2 gate ? to ? drain (?miller?) charge q gd 17 plateau voltage v gp 6.3 v gate resistance r g 3.0 resistive switching characteristics turn ? on delay time v dd = 250 v, i d = 7.5 a, v gs = 10 v, r g = 5 t d(on) 13 ns rise time t r 23 turn ? off delay time t d(off) 31 fall time t f 29 source ? drain diode characteristics (t c = 25 c unless otherwise noted) diode forward voltage i s = 7.5 a, v gs = 0 v v sd 1.6 v reverse recovery time v gs = 0 v, v dd = 30 v i s = 7.5 a, di/dt = 100 a/ s t rr 295 ns reverse recovery charge q rr 1.85 c 4. pulse width 380 s, duty cycle 2%.
ndf08n50z, NDP08N50Z http://onsemi.com 3 typical characteristics 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0 0.0 5.0 10.0 15.0 20.0 25.0 v ds , drain ? to ? source voltage (v) i d , drain current (a) figure 1. on ? region characteristics 7.0 v v gs = 10 v 6.5 v 6.0 v 5.5 v 5.0 v 8.0 v 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0 345678910 v gs , gate ? to ? source voltage (v) i d , drain current (a) figure 2. transfer characteristics v ds = 25 v t j = 150 c t j = ? 55 c t j = 25 c 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10 v gs , gate ? to ? source voltage (v) r ds(on) , drain ? to ? source resistance ( ) figure 3. on ? region versus gate ? to ? source voltage i d = 3.6 a t j = 25 c 0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10 t j = 25 c i d , drain current (a) figure 4. on ? resistance versus drain current and gate voltage r ds(on) , drain ? to ? source resistance ( ) v gs = 10 v 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 2.75 ? 50 ? 25 0 25 50 75 100 125 150 r ds(on) , drain ? to ? source resistance (normalized) i d = 3.6 a v gs = 10 v t j , junction temperature ( c) figure 5. on ? resistance variation with temperature 0.90 0.95 1.00 1.05 1.10 1.15 ? 50 ? 25 0 25 50 75 100 125 150 t j , junction temperature ( c) figure 6. bv dss variation with temperature bv dss , normalized breakdown voltage (v) i d = 1 ma
ndf08n50z, NDP08N50Z http://onsemi.com 4 typical characteristics 0.10 1.0 10 0 50 100 150 200 250 300 350 400 450 500 v ds , drain ? to ? source voltage (v) i dss , leakage ( a) figure 7. drain ? to ? source leakage current versus voltage t j = 150 c t j = 125 c 0 200 400 600 800 1000 1200 1400 1600 1800 2000 0 5 10 15 20 25 30 35 40 45 50 v ds , drain ? to ? source voltage (v) c, capacitance (pf) figure 8. capacitance variation t j = 25 c v gs = 0 v f = 1 mhz 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 13.0 14.0 15.0 0 4 8 121620242832 0 50 100 150 200 250 300 q g , total gate charge (nc) figure 9. gate ? to ? source voltage and drain ? to ? source voltage versus total charge v gs , gate ? to ? source voltage (v) v ds , drain ? to ? source voltage (v) q t q gd q gs v ds = 250 v i d = 7.5 a t j = 25 c v ds v gs 1.0 10 100 1000 1 10 100 r g , gate resistance ( ) t, time (ns) figure 10. resistive switching time variation versus gate resistance v dd = 250 v i d = 7.5 a v gs = 10 v t d(off) t f t r t d(on) 0.1 1.0 10.0 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 125 c t j = 150 c 25 c ? 55 c v sd , source ? to ? drain voltage (v) figure 11. diode forward voltage versus current i s , source current (a) c iss c oss c rss
ndf08n50z, NDP08N50Z http://onsemi.com 5 typical characteristics 0.01 0.1 1 10 100 0.1 1 10 100 1000 v ds , drain ? to ? source voltage (v) i d , drain current (a) figure 12. maximum rated forward biased safe operating area ndf08n50z v gs 30 v single pulse t c = 25 c 10 s 100 s 10 ms dc 1 ms r ds(on) limit thermal limit package limit 0.1 0.00001 pulse time (s) 10 0.1 0.01 0.001 0.0001 0.001 0.01 1.0 10 100 0.000001 50% (duty cycle) 20% 10% 5.0% 2.0% 1.0% single pulse 1000 r(t) (c/w) figure 13. thermal impedance (junction ? to ? case) for ndf08n50z 1.0 r jc = 4.0 c/w steady state leads heatsink 0.110 min measurement made between leads and heatsink with all leads shorted together. figure 14. isolation test diagram *for additional mounting information, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
ndf08n50z, NDP08N50Z http://onsemi.com 6 package dimensions to ? 220 fullpak case 221d ? 03 issue k style 1: pin 1. gate 2. drain 3. source dim a min max min max millimeters 0.617 0.635 15.67 16.12 inches b 0.392 0.419 9.96 10.63 c 0.177 0.193 4.50 4.90 d 0.024 0.039 0.60 1.00 f 0.116 0.129 2.95 3.28 g 0.100 bsc 2.54 bsc h 0.118 0.135 3.00 3.43 j 0.018 0.025 0.45 0.63 k 0.503 0.541 12.78 13.73 l 0.048 0.058 1.23 1.47 n 0.200 bsc 5.08 bsc q 0.122 0.138 3.10 3.50 r 0.099 0.117 2.51 2.96 s 0.092 0.113 2.34 2.87 u 0.239 0.271 6.06 6.88 seating plane ? t ? u c s j r notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch 3. 221d-01 thru 221d-02 obsolete, new standard 221d-03. ? b ? ? y ? g n d l k h a f q 3 pl 123 m b m 0.25 (0.010) y to ? 220 case 221a ? 09 issue af notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. style 5: pin 1. gate 2. drain 3. source 4. drain dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.405 9.66 10.28 c 0.160 0.190 4.07 4.82 d 0.025 0.035 0.64 0.88 f 0.142 0.161 3.61 4.09 g 0.095 0.105 2.42 2.66 h 0.110 0.155 2.80 3.93 j 0.014 0.025 0.36 0.64 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.045 0.055 1.15 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 --- 1.15 --- z --- 0.080 --- 2.04 b q h z l v g n a k f 123 4 d seating plane ? t ? c s t u r j on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ndf08n50z/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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